Introduction

Mixtile Blade 3 is a low-cost, low-power single-board computer (SBC) based on the next-generation, 8 nm Rockchip RK3588 CPU. It is ideal for quick development, AI-application prototyping, and edge computing, and it allows you to extend your deployment by clustering several Mixtile Blade 3 SBCs. It also features a 4-lane PCIe Gen3 port for communicating with other processing nodes, allowing for high-performance computing with minimal carbon footprint.

Main Features

• CPU: Rockchip Octa-core Cortex-A76/A55 SoC processor RK3588
• NPU: Up to 6 TOPS
• Memory: Up to 32 GB LPDDR4/LPDDR5 memory, up to 256 GB eMMC storage
• HDMI interface: HDMI 2.1 output (8K @ 60 FPS or 4K @ 120 FPS), HDMI 2.0 input (4K @ 60 FPS)
• Video encoder: H.264/H.265 video encoder up to 8K @ 30 FPS
• Video decoder: H.265/H.264/VP9 video decoder up to 8K @ 60 FPS
• Camera Input: 4-lane MIPI-CSI
• PCIe expansion: Mini-PCIe socket with PCIe Gen 2.1, USB 2.0 support
• Storage expansion: 4-lane PCIe Gen 3 in U.2 port, SATA 3.0 in U.2 port, Micro-SD 3.0 flash socket
• Ethernet expansion: Dual 2.5 gigabit Ethernet ports
• USB: Dual USB 3.2 Gen 1 Type-C ports, DisplayPort 1.4 A
• GPIOs: 30-pin GPIO socket (Digital I/O, I²C, USB 2.0, TTL UART, SPI, I²S)
• Software support: Preloaded customized Debian 11, Support other Linux distributions and Android 12 (**will release in future**)
• Power: USB1/PD Type-C Port support USB PD 2.0 protocol (Optional: 12 V DC standard SATA power via U.2 port)
• Dimensions: 2.5-inch Pico-ITX form factor, 100 mm x 72 mm

Connectors and Pinouts

Block Diagram

The block diagram of the Blade 3 SBC is shown below, along with descriptions of each connector and pinout.

Specs Layout

The specification layout is depicted in the picture below, along with the ports accessible on Blade 3 for application-based development.

Dimensions

Connectors & Pinouts Description

This section lists the interfaces connector pin assignments and pin types with signal descriptions.

Table 1. 30-PIN Header

PIN	NAME	TYPE	INPUT/OUTPUT	DESCRIPTION
1	VCC_5V0	Power	Output	Power supply  for USB, 5 V output MAX 500 mA
2	GND	Power	NA	Power and signal reference ground
3	USB20_HOST0_DM	LVDS	BI	USB20 HOST Port0 Data Minus
4	I2S2_SDI_M1	signal	Input	I2S2 data input
5	USB20_HOST0_DP	LVDS	BI	USB20 HOST Port0 Data Plus
6	I2S2_SDO_M1	signal	Output	I2S2 data output
7	GND	Power	NA	Power and signal reference ground
8	I2S2_MCLK_M1	signal	Output	I2S2 Master clock
9	I2C5_SDA_M3	signal	BI	I2C5 Bus Date
10	I2S2_SCLK_M1	signal	BI	I2S2 serial clock or BCLK
11	I2C5_SCL_M3	signal	Output	I2C5 Bus clock
12	I2S2_LRCK_M1	signal	BI	I2S2 Left/Right channel clock
13	GND	Power	NA	Power and signal reference ground
14	GND	Power	NA	Power and signal reference ground
15	SPI4_MISO_M2	signal	Input	SPI4 Master input, Slave output
16	CAN2_RX	signal	Input	CAN2 receive data
17	SPI4_MOSI_M2	signal	Output	SPI4 Master output, Slave input
18	CAN2_TX	signal	Output	CAN2 transmit data
19	SPI4_CLK_M2	signal	Output	SPI4 clock
20	GND	Power	NA	Power and signal reference ground
21	SPI4_CS0_M2	signal	Output	SPI4 Chip Select 0
22	GPIO0_B0	signal	BI	GPIO bank 0 port B0
23	GPIO1_A4	signal	BI	GPIO bank 1 port A4
24	SARADC_VIN7	Analog	Input	SAR ADC Channel 7 input
25	GND	Power	NA	Power and signal reference ground
26	SARADC_VIN6	Analog	Input	SAR ADC Channel 6 input
27	PWM14	signal	BI	Pulse Width Modulation 14 input or output
28	GND	Power	NA	Power and signal reference ground
29	PWM15	signal	BI	Pulse Width Modulation 15 input or output
30	VCC_3V3_S0	Power	Output	Power supply for peripheral, 3.3 V output MAX 500 mA

Table. 2PIN FAN

PIN	NAME	TYPE	INPUT/OUTPUT	DESCRIPTION
1	VCC5V_FAN	Power	Output	Power supply  for FAN, 5 V output MAX 400 mA. Controlled by GPIO3_C0
2	GND	Power	NA	Power reference ground

Table 3. mini-PCIe

PIN	NAME	TYPE	INPUT/OUTPUT	DESCRIPTION
1	MINIPCIE20_WAKEN_3V3_L	signal	Input	Wake up signal from mini-PCIe device
2	VCC3V3_MINIPCIE	Power	Output	Power supply  for mini-PCIe device, 3.3 V output MAX 3A in all pins
3	NC	float	NA	Not connected to this pin
4	GND	Power	NA	Power and signal reference ground
5	NC	float	NA	Not connected to this pin
6	NC	float	NA	Not connected to this pin
7	MINIPCIE20_CLKREQN_3V3_L	signal	Input	PCIe2.0 Channel Reference clock request
8	NC	float	NA	Not connected to this pin
9	GND	Power	NA	Power and signal reference ground
10	NC	float	NA	Not connected to this pin
11	PCIE20_2_REFCLKN	LVDS	Output	PCIe20 Port2 differential clock Negative
12	NC	float	NA	Not connected to this pin
13	PCIE20_2_REFCLKP	LVDS	Output	PCIe20 Port2 differential clock Positive
14	NC	float	NA	Not connected to this pin
15	GND	Power	NA	Power and signal reference ground
16	NC	float	NA	Not connected to this pin
17	NC	float	NA	Not connected to this pin
18	GND	Power	NA	Power and signal reference ground
19	NC	float	NA	Not connected to this pin
20	W_DISABLEN	signal	Output	PCIE device wireless disable
21	GND	Power	NA	Power and signal reference ground
22	MINIPCIE20_PERSTN	signal	Output	PCIe device reset
23	PCIE20_2_RXN	LVDS	Input	PCIe20 receive differential Negative
24	VCC3V3_MINIPCIE	Power	Output	Power supply  for mini-PCIe device, 3.3 V output MAX 3A in all pins
25	PCIE20_2_RXP	LVDS	Input	PCIe20 receive differential Positive
26	GND	Power	NA	Power and signal reference ground
27	GND	Power	NA	Power and signal reference ground
28	NC	float	NA	Not connected to this pin
29	GND	Power	NA	Power and signal reference ground
30	NC	float	NA	Not connected to this pin
31	MINIPCIE20_TX_N	LVDS	Output	PCIe20 transmit differential Negative
32	NC	float	NA	Not connected to this pin
33	MINIPCIE20_TX_P	LVDS	Output	PCIe20 transmit differential Positive
34	GND	Power	NA	Power and signal reference ground
35	GND	Power	NA	Power and signal reference ground
36	MINIPCIE_USB_DM	LVDS	BI	USB20 HOST Port1 Data Minus
37	GND	Power	NA	Power and signal reference ground
38	MINIPCIE_USB_DP	LVDS	BI	USB20 HOST Port1 Data Plus
39	VCC3V3_MINIPCIE	Power	Output	Power supply  for mini-PCIe device, 3.3 V output MAX 3 A in all pins
40	GND	Power	NA	Power and signal reference ground
41	VCC3V3_MINIPCIE	Power	Output	Power supply  for mini-PCIe device, 3.3 V output MAX 3 A in all pins
42	NC	float	NA	Not connected to this pin
43	GND	Power	NA	Power and signal reference ground
44	NC	float	NA	Not connected to this pin
45	NC	float	NA	Not connected to this pin
46	NC	float	NA	Not connected to this pin
47	NC	float	NA	Not connected to this pin
48	NC	float	NA	Not connected to this pin
49	NC	float	NA	Not connected to this pin
50	GND	Power	NA	Power and signal reference ground
51	NC	float	NA	Not connected to this pin
52	VCC3V3_MINIPCIE	Power	Output	Power supply  for mini-PCIe device, 3.3 V output MAX 3 A in all pins

Table 4. 30-PIN MIPI-CSI

PIN	NAME	TYPE	INPUT/OUTPUT	DESCRIPTION
1	GND	Power	NA	Power and signal reference ground
2	MIPI_CSI0_RX_D0N	LVDS	Input	MIPI CSI0 receive  differential data lane 0 Negative
3	MIPI_CSI0_RX_D0P	LVDS	Input	MIPI CSI0 receive  differential data lane 0 Positive
4	GND	Power	NA	Power and signal reference ground
5	MIPI_CSI0_RX_D1N	LVDS	Input	MIPI CSI0 receive  differential data lane 1 Negative
6	MIPI_CSI0_RX_D1P	LVDS	Input	MIPI CSI0 receive  differential data lane 1 Positive
7	GND	Power	NA	Power and signal reference ground
8	MIPI_CSI0_RX_CLK0N	LVDS	Input	MIPI CSI0 receive  differential Clock 0 Negative
9	MIPI_CSI0_RX_CLK0P	LVDS	Input	MIPI CSI0 receive  differential Clock 0 Positive
10	GND	Power	NA	Power and signal reference ground
11	MIPI_CSI0_RX_D2N	LVDS	Input	MIPI CSI0 receive  differential data lane 2 Negative
12	MIPI_CSI0_RX_D2P	LVDS	Input	MIPI CSI0 receive  differential data lane 2 Positive
13	GND	Power	NA	Power and signal reference ground
14	MIPI_CSI0_RX_D3N	LVDS	Input	MIPI CSI0 receive  differential data lane 3 Negative
15	MIPI_CSI0_RX_D3P	LVDS	Input	MIPI CSI0 receive  differential data lane 3 Positive
16	GND	Power	NA	Power and signal reference ground
17	MIPI_CAM_PWM2	signal	Output	PWM2 for LENS
18	NC	float	NA	Not connected to this pin
19	VCC_3V3_S0	Power	Output	Power supply for sensor board, 3.3 V output
20	MIPI_CAM_RESETN	signal	Output	GPIO out for sensor reset
21	NC	float	NA	Not connected to this pin
22	MIPI_CAM_PDN	signal	Output	GPIO out for sensor power down
23	I2C3_SDA_M3_MIPI	signal	BI	I2C5 Bus data
24	I2C3_SCL_M3_MIPI	signal	Output	I2C5 Bus clock
25	GND	Power	NA	Power and signal reference ground
26	MIPI_CAM2_CLK_M1_3V3	signal	Output	Camera Master clock output
27	GND	Power	NA	Power and signal reference ground
28	VCC_5V0	Power	Output	Power supply for sensor board, 5 V output
29	VCC_5V0	Power	Output	Power supply for sensor board, 5 V output
30	VCC_5V0	Power	Output	Power supply for sensor board, 5 V output

Table 5. U.2 Plug

PIN	NAME	TYPE	INPUT/OUTPUT	DESCRIPTION
PIN	NAME	TYPE	INPUT/OUTPUT	DESCRIPTION
E1	PCIE30_REFCLKP_SLOT	LVDS	Output	RC PCIe30 differential clock Positive
E2	PCIE30_REFCLKN_SLOT	LVDS	Output	RC PCIe30 differential clock Negative
E3	VCC_3V3_S0	Power	Output	Power supply for IO
E4	PCIE30X4_CLKREQN_M1_L	signal	Output	DM PCIe30 Channel Reference clock request
E5	PCIE30X4_PERSTN_M1_L	signal	Input	DM PCIe30 Channel reset
E6	PCIE30X4_CLKREQN_M3	signal	Input	RC PCIe30 Channel Reference clock request
E7	PCIE30_PORT1_REFCLKP	LVDS	Input	DM PCIe30 differential clock Positive
E8	PCIE30_PORT1_REFCLKN	LVDS	Input	DM PCIe30 differential clock Negative
E9	GND	Power	NA	Power and signal reference ground.
E10	PCIE30_PORT1_TX2P	LVDS	Output	DM PCIe30 transmit differential Positive
E11	PCIE30_PORT1_TX2N	LVDS	Output	DM PCIe30 transmit differential Negative
E12	GND	Power	NA	Power and signal reference ground
E13	PCIE30_PORT1_RX2N	LVDS	Input	DM PCIe30 receive differential Negative
E14	PCIE30_PORT1_RX2P	LVDS	Input	DM PCIe30 receive differential Positive
E15	GND	Power	NA	Power and signal reference ground
E16	NC	float	NA	Not connected to this pin
E17	PCIE30_PORT0_RX1P	LVDS	Input	RC PCIe30 receive differential Negative
E18	PCIE30_PORT0_RX1N	LVDS	Input	RC PCIe30 receive differential Positive
E19	GND	Power	NA	Power and signal reference ground
E20	PCIE30_PORT0_TX1N	LVDS	Output	RC PCIe30 transmit differential Positive
E21	PCIE30_PORT0_TX1P	LVDS	Output	RC PCIe30 transmit differential Negative
E22	GND	Power	NA	Power and signal reference ground
E23	I2C4_SCL_M0	signal	Output	I2C4 Bus clock
E24	I2C4_SDA_M0	signal	BI	I2C4 Bus data
E25	DUALPORT_EN#	signal	Output	GPIO for Enable dual port, default low
P1	PCIE30X4_WAKEN_M1_L	signal	Output	DM PCIE30 Wake up signal from RC
P2	PCIE30X4_WAKEN_M3	signal	Input	RC PCIE30 Wake up signal from DM
P3	PWRDIS	signal	Output	GPIO for power disable to device
P4	IFDET	signal	Input	GPIO for detect interface of device
P5	GND	Power	NA	Power and signal reference ground
P6	GND	Power	NA	Power and signal reference ground
P7	NC	float	NA	Not connected to this pin
P8	NC	float	NA	Not connected to this pin
P9	NC	float	NA	Not connected to this pin
P10	PRSNT#	signal	Input	GPIO for detect  device if present
P11	ACTIVITY#	signal	Input	GPIO for detect  device if activity
P12	GND	Power	NA	Power and signal reference ground
P13	U2_12V	Power	Input	Power supply for blade3, input 12 V
P14	U2_12V	Power	Input	Power supply for blade3, input 12 V
P15	U2_12V	Power	Input	Power supply for blade3, input 12 V
S1	GND	Power	NA	Power and signal reference ground
S2	SATA0_TXP	LVDS	Output	SATA30 Port0 transmit differential Positive
S3	SATA0_TXN	LVDS	Output	SATA30 Port0 transmit differential Negative
S4	GND	Power	NA	Power and signal reference ground
S5	SATA0_RXN	LVDS	Input	SATA30 Port0 receive differential Positive
S6	SATA0_RXP	LVDS	Input	SATA30 Port0 receive differential Negative
S7	GND	Power	NA	Power and signal reference ground
S8	GND	Power	NA	Power and signal reference ground
S9	NC	float	NA	Not connected to this pin
S10	NC	float	NA	Not connected to this pin
S11	GND	Power	NA	Power and signal reference ground
S12	NC	float	NA	Not connected to this pin
S13	NC	float	NA	Not connected to this pin
S14	GND	Power	NA	Power and signal reference ground
S15	PCIE30X4_PERSTN_M3	signal	Output	RC PCIe30 Channel reset
S16	GND	Power	NA	Power and signal reference ground
S17	PCIE30_PORT1_TX3P	LVDS	Output	DM PCIe30 transmit differential Negative
S18	PCIE30_PORT1_TX3N	LVDS	Output	DM PCIe30 transmit differential Positive
S19	GND	Power	NA	Power and signal reference ground
S20	PCIE30_PORT1_RX3N	LVDS	Input	DM PCIe30 receive differential Negative
S21	PCIE30_PORT1_RX3P	LVDS	Input	DM PCIe30 receive differential Positive
S22	GND	Power	NA	Power and signal reference ground
S23	PCIE30_PORT0_RX0P	LVDS	Input	RC PCIe30 receive differential Negative
S24	PCIE30_PORT0_RX0N	LVDS	Input	RC PCIe30 receive differential Positive
S25	GND	Power	NA	Power and signal reference ground
S26	PCIE30_PORT0_TX0N	LVDS	Output	RC PCIe30 transmit differential Negative
S27	PCIE30_PORT0_TX0P	LVDS	Output	RC PCIe30 transmit differential Positive
S28	GND	Power	NA	Power and signal reference ground

Table 6. 3-PIN DEBUG Header

PIN	NAME	TYPE	INPUT/OUTPUT	DESCRIPTION
1	UART2_RX_M0_DEBUG	signal	Intput	UART2 Receive Data for debug
2	UART2_TX_M0_DEBUG	signal	Output	UART2 Transmit Data for debug
3	GND	signal	NA	Power and signal reference ground